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To: pups@minnie.cs.adfa.edu.au
Subject: Help: PDP-11 instruction classification
References: <20000508150240.A7092@loomcom.com>
From: lars brinkhoff <lars@nocrew.org>
Date: 09 May 2000 09:25:55 +0200
In-Reply-To: sjm's message of "Mon, 8 May 2000 15:02:40 -0700"
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I'm adding PDP-11 support to GNU binutils, and I need help on
classifying the instruction set.

I'm somewhat confused, because:

  PDP-11 FAQ says:
  11/45 introduced MUL, DIV, ASH, ASHC, SPL.
  Later, 11/40 introduced SOB, XOR, MARK, SXT, RTT.  MUL, DIV, etc in
  EIS option.

  GCC pdp11.md and pdp11.c says:
  11/40 and 11/45 has SOB, SXT, XOR.
  11/45 has ASHC, MUL, DIV.
  All models has ASH.

  John Holden writes:
  11/40 and 11/45 has EIS and FPU instructions.
  11/40 had several options to add EIS, FIS and a MMU.

Does this mean that an unexpanded 11/40 has no EIS instructions,
but with the EIS option, it has more instructions than an 11/45?

GCC seems to think that all PDP-11 models has ASH, but this seems
wrong.  It's only in EIS, right?

So far, this is the classification I've come up with:

  BASIC: the basic instruction set.
  CIS: commercial instruction set (opcodes 0x7d00..0x7eff).
  EIS45: 11/45 extended instruction set: MUL, DIV, ASH, ASHC, SPL.
  EIS40: 11/40 extended instruction set: EIS45 + SOB, XOR, MARK, SXT, RTT.
  FIS: FADD, FSUB, FMUL, and FDIV (opcodes 0x7a00..0x7bff).
  FPU: LDF, STF, LDCFF', STCFF', CMPF, LDEXP, STEXP, LDCIF, STCFI, MULF,
       MODF, ADDF, SUBF, and DIVF (opcodes 0xf000..0xffff).

Would this be correct?

FIS and CIS isn't imlemented in Supnik's simulator, and I haven't
found any documentation.  Does anyone know more about those?  Why
is there both an FADD and an ADDF instruction?

